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HM628512A Series
524288-word x 8-bit High Speed CMOS Static RAM
ADE-203-640A (Z) Rev. 1.0 Dec. 2, 1996 Description
The Hitachi HM628512A is a 4-Mbit static RAM organized 512-kword x 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.5 m Hi-CMOS process technology. The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II or 600-mil plastic DIP, is available for high density mounting. The HM628512A is suitable for battery backup system.
Features
* Single 5 V supply * Access time: 55/70 ns (max) * Power dissipation Active: 50 mW/MHz (typ) Standby: 10 W (typ) * Completely static memory. No clock or timing strobe required * Equal access and cycle times * Common data input and output: Three state output * Directly TTL compatible: All inputs and outputs * Battery backup operation
HM628512A Series
Ordering Information
Type No. HM628512ALP-5 HM628512ALP-7 HM628512ALP-5SL HM628512ALP-7SL HM628512ALFP-5 HM628512ALFP-7 HM628512ALFP-5SL HM628512ALFP-7SL HM628512ALTT-5 HM628512ALTT-7 HM628512ALTT-5SL HM628512ALTT-7SL HM628512ALRR-5 HM628512ALRR-7 HM628512ALRR-5SL HM628512ALRR-7SL Access time 55 ns 70 ns 55 ns 70 ns 55 ns 70 ns 55 ns 70 ns 55 ns 70 ns 55 ns 70 ns 55 ns 70 ns 55 ns 70 ns 400-mil 32-pin plastic TSOP II reverse (TTP-32DR) 400-mil 32-pin plastic TSOP II (TTP-32D) 525-mil 32-pin plastic SOP (FP-32D) Package 600-mil 32-pin plastic DIP (DP-32)
2
HM628512A Series
Pin Arrangement
HM628512ALP Series HM628512ALFP Series A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS I/O7 I/O6 I/O5 I/O4 I/O3 VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS I/O7 I/O6 I/O5 I/O4 I/O3 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 (Top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) HM628512ALRR Series HM628512ALTT Series
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS I/O7 I/O6 I/O5 I/O4 I/O3
Pin Description
Pin name A0 to A18 I/O0 to I/O7 CS OE WE VCC VSS Function Address input Data input/output Chip select Output enable Write enable Power supply Ground
3
HM628512A Series
Block Diagram
V CC V SS
* * * * *
A12 A7 A1 A0 A2 A5 A6 A3 A4 A18 Row Decoder Memory Matrix 1,024 x 4,096
I/O0 Input Data Control I/O7
* *
Column I/O Column Decoder
* *
A10 A13 A17A15A8 A9 A11 A14A16
* *
CS WE OE
Timing Pulse Generator Read/Write Control
4
HM628512A Series
Function Table
WE x H H L L CS H L L L L OE x H L H L Mode Not selected Output disable Read Write Write VCC current I SB , I SB1 I CC I CC I CC I CC Dout pin High-Z High-Z Dout Din Din Ref. cycle -- -- Read cycle Write cycle (1) Write cycle (2)
Note: x: H or L
Absolute Maximum Ratings
Parameter Power supply voltage Voltage on any pin relative to V SS Power dissipation Operating temperature Storage temperature Storage temperature under bias Symbol VCC VT PT Topr Tstg Tbias Value -0.5 to +7.0 -0.5* to V CC + 0.3* 1.0 0 to +70 -55 to +125 -10 to +85
1 2
Unit V V W C C C
Notes: 1. -3.0 V for pulse half-width 30 ns 2. Maximum voltage is 7.0 V
Recommended DC Operating Conditions (Ta = 0 to +70C)
Parameter Supply voltage Symbol VCC VSS Input high voltage Input low voltage Note: VIH VIL Min 4.5 0 2.2 -0.3
*1
Typ 5.0 0 -- --
Max 5.5 0 VCC + 0.3 0.8
Unit V V V V
1. -3.0 V for pulse half-width 30 ns
5
HM628512A Series
DC Characteristics (Ta = 0 to +70C, VCC = 5 V 10% , VSS = 0 V)
Parameter Input leakage current Output leakage current Operating power supply current: DC Operating power supply current Symbol Min Typ*1 Max |ILI| |ILO | I CC -- -- -- -- -- -- 8 45 1 1 15 70 Unit A A mA mA Test conditions Vin = VSS to V CC CS = VIH or OE = VIH or WE = VIL, VI/O = VSS to V CC CS = VIL, others = VIH/V IL, I I/O = 0 mA Min cycle, duty = 100% CS = VIL, others = VIH/V IL I I/O = 0 mA Cycle time = 1 s, duty = 100% I I/O = 0 mA, CS 0.2 V VIH V CC - 0.2 V, VIL 0.2 V CS = VIH Vin 0 V, CS V CC - 0.2 V
HM628512A-5 I CC1
HM628512A-7 I CC1 Operating power supply current I CC2
-- --
40 10
60 20
mA mA
Standby power supply current: DC Standby power supply current (1): DC
I SB I SB1
-- -- --
1 2* 2*
2 3
3 100* 50* 0.4 --
3 2
mA A A V V
Output low voltage Output high voltage
VOL VOH
-- 2.4
-- --
I OL = 2.1 mA I OH = -1.0 mA
Notes: 1. Typical values are at VCC = 5.0 V, Ta = +25C and specified loading, and not guaranteed. 2. This characteristics is guaranteed only for L version. 3. This characteristics is guaranteed only for L-SL version.
Capacitance (Ta = 25C, f = 1 MHz)
Parameter Input capacitance*
1 1
Symbol Cin CI/O
Typ -- --
Max 8 10
Unit pF pF
Test conditions Vin = 0 V VI/O = 0 V
Input/output capacitance* Note:
1. This parameter is sampled and not 100% tested.
6
HM628512A Series
AC Characteristics (Ta = 0 to +70C, VCC = 5 V 10%, unless otherwise noted.)
Test Conditions * * * * Input pulse levels: 0.8 V to 2.4 V Input rise and fall time: 5 ns Input and output timing reference levels: 1.5 V Output load: 1 TTL Gate + C L (100 pF) (HM628512A-7) 1 TTL Gate + C L (50 pF) (HM628512A-5) (Including scope & jig)
Read Cycle
HM628512A -5 Parameter Read cycle time Address access time Chip select access time Output enable to output valid Chip selection to output in low-Z Output enable to output in low-Z Chip deselection to output in high-Z Output disable to output in high-Z Output hold from address change Symbol t RC t AA t CO t OE t LZ t OLZ t HZ t OHZ t OH Min 55 -- -- -- 10 5 0 0 10 Max -- 55 55 25 -- -- 20 20 -- -7 Min 70 -- -- -- 10 5 0 0 10 Max -- 70 70 35 -- -- 25 25 -- Unit ns ns ns ns ns ns ns ns ns 2 2 1, 2 1, 2 Notes
7
HM628512A Series
Write Cycle
HM628512A -5 Parameter Write cycle time Chip selection to end of write Address setup time Address valid to end of write Write pulse width Write recovery time WE to output in high-Z Data to write time overlap Data hold from write time Output active from output in high-Z Output disable to output in high-Z Symbol t WC t CW t AS t AW t WP t WR t WHZ t DW t DH t OW t OHZ Min 55 50 0 50 40 0 0 25 0 5 0 Max -- -- -- -- -- -- 20 -- -- -- 20 -7 Min 70 60 0 60 50 0 0 30 0 5 0 Max -- -- -- -- -- -- 25 -- -- -- 25 Unit ns ns ns ns ns ns ns ns ns ns ns 2 1, 2, 7 3, 12 6 1, 2, 7 4 5 Notes
Notes: 1. t HZ , t OHZ and t WHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referred to output voltage levels. 2. This parameter is sampled and not 100% tested. 3. A write occurs during the overlap (tWP) of a low CS and a low WE. A write begins at the later transition of CS going low or WE going low. A write ends at the earlier transition of CS going high or WE going high. tWP is measured from the beginning of write to the end of write. 4. t CW is measured from CS going low to the end of write. 5. t AS is measured from the address valid to the beginning of write. 6. t WR is measured from the earlier of WE or CS going high to the end of write cycle. 7. During this period, I/O pins are in the output state so that the input signals of the opposite phase to the outputs must not be applied. 8. If the CS low transition occurs simultaneously with the WE low transition or after the WE transition, the output remain in a high impedance state. 9. Dout is the same phase of the write data of this write cycle. 10. Dout is the read data of next address. 11. If CS is low during this period, I/O pins are in the output state. Therefore, the input signals of the opposite phase to the outputs must not be applied to them. 12. In the write cycle with OE low fixed, tWP must satisfy the following equation to avoid a problem of data bus contention. t WP tDW min + tWHZ max
8
HM628512A Series
Timing Waveforms
Read Timing Waveform (WE = VIH)
tRC
Address tAA tCO CS tLZ tOE tOLZ OE tOHZ tHZ
Dout
Valid Data tOH
9
HM628512A Series
Write Timing Waveform (1) (OE Clock)
tWC Address tAW OE tCW CS
*8
tWR
tAS WE tOHZ Dout
tWP
tDW Din Valid Data
tDH
10
HM628512A Series
Write Timing Waveform (2) (OE Low Fixed)
tWC Address tCW CS
*8
tWR
tAW tWP
WE
tAS tWHZ tOW
tOH
*9
*10
Dout tDW Din tDH
*11
Valid Data
11
HM628512A Series
Low VCC Data Retention Characteristics (Ta = 0 to +70C)
Parameter VCC for data retention Data retention current Symbol VDR I CCDR Min 2 -- -- Chip deselect to data retention time Operation recovery time t CDR tR 0 5 Typ -- 1*
4
Max -- 50*
1
Unit V A A ns ms
Test conditions*3 CS V CC - 0.2 V, Vin 0 V VCC = 3.0 V, Vin 0 V CS V CC - 0.2 V
1* 4 -- --
15* 2 -- --
See retention waveform
Notes: 1. For L-version and 20 A (max.) at Ta = 0 to 40C. 2. For SL-version and 3 A (max.) at Ta = 0 to 40C. 3. CS controls address buffer, WE buffer, OE buffer, and Din buffer. In data retention mode, Vin levels (address, WE, OE, I/O) can be in the high impedance state. 4. Typical values are at VCC = 3.0 V, Ta = 25C and specified loading, and not guaranteed.
Low V CC Data Retention Timing Waveform (CS Controlled)
tCDR VCC 4.5 V Data retention mode tR
2.2 V VDR CS 0V CS VCC - 0.2 V
12
HM628512A Series
Package Dimensions
HM628512ALP Series (DP-32)
Unit: mm
32
41.90 42.50 Max
17 13.4 13.7 Max
1
5.08 Max
1.20 2.30 Max
1.20
16 15.24
0.51 Min 2.54 Min
2.54 0.25
0.48 0.10
0.25 - 0.05 0 - 15
+ 0.11
Hitachi Code JEDEC Code EIAJ Code Weight
DP-32 -- SC-613 5.1 g
13
HM628512A Series
HM628512ALFP Series (FP-32D)
Unit: mm
20.45 20.95 Max 32 17
1 1.00 Max
16 3.00 Max 0.22 0.05 0.20 0.04
11.30
14.14 0.30 1.42
0.12 0.15 + 0.10 -
0 - 8 0.80 0.20
1.27 0.40 0.08 0.38 0.06
0.10 0.15 M
Hitachi Code JEDEC Code EIAJ Code Weight
FP-32D -- -- 1.3 g
14
HM628512A Series
HM628512ALTT Series (TTP-32D)
Unit: mm
20.95 21.35 Max 32 17
1 0.42 0.08 0.40 0.06 1.15 Max
1.27 0.21
M
16
10.16
0.80 11.76 0.20 0 - 5 0.50 0.10
0.10
0.17 0.05 0.125 0.04
0.13 0.05
1.20 Max
Hitachi Code JEDEC Code EIAJ Code Weight
TTP-32D MO-133CA -- 0.51 g
15
HM628512A Series
HM628512ALRR Series (TTP-32DR)
Unit: mm
20.95 21.35 Max 1 16
32 0.42 0.08 0.40 0.06 1.15 Max
1.27 0.21
M
17
10.16
0.80 11.76 0.20 0 - 5 0.50 0.10
0.10
0.17 0.05 0.125 0.04
0.13 0.05
1.20 Max
Hitachi Code JEDEC Code EIAJ Code Weight
TTP-32DR MO-133CA -- 0.51 g
16
HM628512A Series
When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi's permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user's unit according to this document. 4. Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Hitachi's semiconductor products. Hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein. 5. No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi, Ltd. 6. MEDICAL APPLICATIONS: Hitachi's products are not authorized for use in MEDICAL APPLICATIONS without the written consent of the appropriate officer of Hitachi's sales company. Such use includes, but is not limited to, use in life support systems. Buyers of Hitachi's products are requested to notify the relevant Hitachi sales offices when planning to use the products in MEDICAL APPLICATIONS.
Hitachi, Ltd.
Semiconductor & IC Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 For further information write to: Hitachi America, Ltd. Semiconductor & IC Div. 2000 Sierra Point Parkway Brisbane, CA. 94005-1835 USA Tel: 415-589-8300 Fax: 415-583-4207
Hitachi Europe GmbH Electronic Components Group Continental Europe Dornacher Strae 3 D-85622 Feldkirchen Munchen Tel: 089-9 91 80-0 Fax: 089-9 29 30 00
Hitachi Europe Ltd. Electronic Components Div. Northern Europe Headquarters Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA United Kingdom Tel: 0628-585000 Fax: 0628-778322
Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 0104 Tel: 535-2100 Fax: 535-1533 Hitachi Asia (Hong Kong) Ltd. Unit 706, North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel: 27359218 Fax: 27306071
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HM628512A Series
Revision Record
Rev. 0.0 1.0 Date Sep. 12, 1996 Dec. 2, 1996 Contents of Modification Initial issue Deletion of preliminary Drawn by K. Imato Approved by K. Imato
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